[Read download] Wafer Level 3-D ICs Process Technology (Integrated Circuits and Systems)
• From Chuan Seng Tan Ronald J Gutman •
| #3530586 in Books | Chuan Seng Tan Ronald J Gutman | 2008-09-19 | Original language:English | PDF # 1 | 9.21 x.88 x6.14l,1.45 | File Name: 0387765328 | 410 pages | Wafer Level 3 D ICS Process Technology
||From the Back Cover||Wafer Level 3-D ICs Process Technology focuses on foundry-based process technology that enables the fabrication of 3-D ICs. The core of the book discusses alternative technology platforms for pre-packaging wafer level 3-D ICs, with
This book focuses on foundry-based process technology that enables the fabrication of 3-D ICs. The core of the book discusses the technology platform for pre-packaging wafer lever 3-D ICs. However, this book does not include a detailed discussion of 3-D ICs design and 3-D packaging. This is an edited book based on chapters contributed by various experts in the field of wafer-level 3-D ICs process technology. They are from academia, research labs and industry.
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